1. Field of the Invention
The present invention relates to a method and structure of configuring preamble, and more particularly, to a method and structure of configuring preamble to support transmission of data symbol in a wireless communication system.
2. Discussion of the Related Art
In the world of cellular telecommunications, those skilled in the art often use the terms 1G, 2G, and 3G. The terms refer to the generation of the cellular technology used. 1G refers to the first generation, 2G to the second generation, and 3G to the third generation.
1G refers to the analog phone system, known as an AMPS (Advanced Mobile Phone Service) phone systems. 2G is commonly used to refer to the digital cellular systems that are prevalent throughout the world, and include CDMAOne, Global System for Mobile communications (GSM), and Time Division Multiple Access (TDMA). 2G systems can support a greater number of users in a dense area than can 1G systems.
3G commonly refers to the digital cellular systems currently being deployed. These 3 G communication systems are conceptually similar to each other with some significant differences.
Associated with 3G systems is evolution data optimized (EV-DO) system. In cdma2000 1xEV-DO systems, a preamble sequence is transmitted with each Forward Traffic Channel and Control Channel physical layer packet in order to assist the access terminal with synchronization of each variable-rate transmission. The preamble consists of all ‘0’ symbols transmitted on the in-phase component only.
FIG. 1 illustrates a preamble which is time multiplexed into a Forward Traffic Channel stream. In FIG. 1, the preamble length “N” is 64 chips, 128 chips, or 256 chips. FIG. 2 illustrates another preamble time multiplexed into a Forward Traffic Channel stream. Here, the preamble length is 512 chips or 1024 chips.
The preamble sequence is covered by a 64-chip bi-orthogonal sequence and the sequence is repeated 1 to 16 times depending on the transmit mode (e.g., 64, 128, 256, 512, or 1024 chips). The bi-orthogonal sequence is specified in terms of the 64-ary Walsh functions and their bit-by-bit complements byWi/264 for i=0, 2, . . . 126 W(i−1)264 for i=1, 3, . . . , 127where i=0, 1, . . . , 127 is the MACIndex value and Wi64 is the bit-by-bit complement of the 64-chip Walsh function of order i.